Integrated circuits now commonly include a wide variety of different transistor types in combination with one another. By way of example, random access memory transistors, such as static random access memory (SRAM) or dynamic random access memory (DRAM) transistors, are in many configurations used in combination with a variety of logic transistors. A challenge, however, associated with integrating different transistors is that each type of transistor generally requires a threshold voltage (Vt) that is different from what the other types of transistors require. For example, with integrated circuit configurations that combine SRAM and logic transistors, the SRAM transistors typically require a higher Vt than their logic counterparts. This Vt difference is due to the relatively lower power requirements of SRAM transistors as compared to logic transistors.
In conventional designs, these different Vt requirements may be addressed through doping. Specifically, extra doping steps are performed to alter the Vt of the SRAM transistors relative to the logic transistors, and vice versa. This approach, however, has a notable drawback. Since the Vt of the transistors is determined through doping, the doping must be consistent from one device to another to attain consistent Vt. Dopant fluctuations, which can occur in a significant number of devices produced, lead to variability in the transistors which leads to variability in the devices and thus affects device performance. As device feature sizes are scaled, the effects of dopant fluctuations and device variability become even more pronounced.
Therefore, improved techniques for combining transistors having different Vt requirements would be desirable.